The present invention relates to digital-to-analog converters and, in particular, to a high-speed digital-to-analog converter with gain compensation that provides an output signal which corresponds with high precision to the weighted value of a digital input word.
A digital-to-analog converter is typically fabricated as an integrated circuit. One type of digital-to-analog converter comprises an electrical current switch that includes an array of differential amplifiers formed from, for example, bipolar or MOS transistors. Each differential amplifier has one or more input conductors that receive voltage signals which correspond to one bit of a digital input word. Each differential amplifier operates as a switch element that conducts electrical current of a magnitude that corresponds to the binary-weighted value of the signal applied to its input. The character of the analog output signal depends on whether the digital-to-analog converter operates in a single-ended or differential output mode.
In the single-ended output mode, the output conductor of each differential amplifier is connected to a common load resistor. Whenever voltage signals corresponding to a logic 1 are applied to its input conductors, the differential amplifier provides to its output conductor current flow of an amount that corresponds to the binary-weighted value of the input bit. Whenever voltage signals corresponding to a logic 0 are applied to its input conductors, the differential amplifier provides no current flow to its output conductor. The binary-weighted currents flow from the common load resistor into the outputs of the differential amplifiers and thereby cause a voltage corresponding to the weighted value of the input digital word to develop across it.
In the differential output mode, each differential amplifier has first and second output conductors which are supplementary in that the binary-weighted current flows through only one of them at a given time. The first and second output conductors of the differential amplifiers are connected to, respectively, first and second common load resistors. Whenever voltage signals corresponding to a logic 1 are applied to its input conductors, the differential amplifier provides to its first output conductor current flow of an amount that corresponds to the binary-weighted value of the input bit. Whenever voltage signals corresponding to a logic 0 are applied to its input conductors, the differential amplifier provides to its second output conductor current flow of an amount that corresponds to the binary-weighted value of the input bit. The binary-weighted currents flowing through the first and second common load resistors flow into the respective first and second outputs of the differential amplifiers and thereby cause a differential voltage corresponding to the weighted value of the input digital word to develop across them. Operation in the differential mode effectively doubles the peak-to-peak output current and voltage swing of the digital-to-analog converter.
A controlled constant-current source develops the appropriate binary-weighted current that flows through the differential amplifier to which the output of the constant-current source is connected. Each constant-current source derives its binary-weighted current from a current reference source that provides a reference current of fixed amount.
An ideal digital-to-analog converter provides an output signal of either current or voltage which undergoes linear changes in its magnitude in response to incremental changes in the weighted value of the digital input word. The problem with high-speed digital-to-analog converters is that they employ high-speed semiconductor switching devices which function in a nonlinear manner and, therefore, cause a departure from this ideal condition. The result is nonuniform changes in magnitude of the output current or voltage in response to incremental changes in the digital input word.